BOKR, J.; JÁNEŠ, V. Realization of Logical Circuits with Majority Logical Function as Symmetrical Function. Acta Polytechnica, Prague, Czech Republic, v. 45, n. 2, 2005. DOI: 10.14311/678. Disponível em: https://ojs.cvut.cz/ojs/index.php/ap/article/view/678. Acesso em: 22 jan. 2025.