VETTER, M. MODEL-BASED SECURITY ANALYSIS OF FPGA DESIGNS THROUGH REINFORCEMENT LEARNING. Acta Polytechnica, [S. l.], v. 59, n. 5, p. 518–526, 2019. DOI: 10.14311/AP.2019.59.0518. Disponível em: https://ojs.cvut.cz/ojs/index.php/ap/article/view/5030. Acesso em: 6 may. 2024.