KUBALÍK, P.; KUBÁTOVÁ, H. Parity Codes Used for On-Line Testing in FPGA. Acta Polytechnica, [S. l.], v. 45, n. 6, 2005. DOI: 10.14311/788. Disponível em: https://ojs.cvut.cz/ojs/index.php/ap/article/view/788. Acesso em: 3 may. 2024.